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the processors have on-chip flash program memory. This means you don t have to have external EPROMs or ROMs containing your program code. Also, the program memory can be programmed while the processor is in the target without removing it. This allows faster and easier system software upgrades. The program memory can be programmed in situ (i.e., without removing from the target system). The program memory can be programmed in two modes: serial and parallel, which we will discuss later. 2. 32-X-8 general-purpose working registers (in the true RISC tradition). A large register set means that variables can be stored inside the CPU rather than storing the variables in memory, as accessing memory, is time expensive. Thus the program will run faster.

50 m

The core, defined as [C], can be identified as an A, B, or C type core. Thus, [CA] is a core with internal vias only; redistribution makes contact with the surface. [CB] is core with internal and external (through microvia structures). High-density interconnecting structures make contact with the innerlayers of the core. [CC] is passive core, in which there are no interconnections.

Construction Type I to Type VI constructions currently describe all known HDI build-up structures, but as the technology evolves, new ones are likely to be created. The notation used is as follows: x[C]x where x = 0,1,2,3, etc. (that is, the number of build-up layers on that side of the core) [C] = a standard laminated core of materials, with or without vias of n layers

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22.3.1.1 Type I Constructions. This construction (1[C]0 or 1[C]1) describe an HDI in which there are both plated microvias and plated through holes used for interconnection. Type I constructions describe the fabrication of a single microvia layer on either one side (1[C]0) or both sides (1[C]1) of an underlined printed circuit substrate core. The printed circuit core substrate is typically manufactured using conventional printed circuit techniques. The substrate may be rigid or flexible and can have as few as one circuit layer or be as complex as a prefabricated multilayer printed circuit with buried vias. A single layer of dielectric material is then placed on top of the core substrate. Microvias are formed in the dielectric connecting layer 1 to layer 2 and layer n to layer n-1. Through holes are then drilled, connecting layer 1 to layer n. Then the microvias and through holes are metallized or filled with conductive material. Layer 1 and layer n are circuitized and fabrication is completed. Figure 22.4a shows this construction as illustrated in IPC-2226. 22.3.1.2 Type II Constructions. Type II (1[C]0 or 1[C]1 ) has the same HDI layers as Type I. The difference is the core, [C]. Type II allows through vias to be placed in the core before the HDI layers are applied. The processes are the same except for the cores through vias being

filled before the HDI layers are applied. Figure 22.4b shows this construction as illustrated in IPC-2226. 22.3.1.3 Type III Constructions. This construction (2[C]0) describes an HDI in which there are both plated microvias and plated through holes used for interconnection. Type III constructions describe the fabrication of two microvia layers on either one side (2[C]0) or both sides (2[C]2) of an undrilled or drilled printed circuit substrate core. The printed circuit core substrate is typically manufactured using printed circuit techniques. The substrate may be rigid or flexible and have as few as one circuit layer or be as complex as a prefabricated multilayer printed circuit with buried vias. A single layer of dielectric material is then placed on top of the core substrate. Microvias are formed in the dielectric, connecting layer 2 to layer 3 and layer n-1 to layer n-2. This first microvia layer is either metallized or filled with conductive material and then circuitized. A second layer of dielectric material is then placed on top of this circuitized layer and microvias are formed connecting layer 1 to layer 2 and layer n to layer n-1. Through holes are then drilled connecting layer 1 to layer n. The microvias and through holes are then metallized or filled with conductive material. Layer 1 and layer n are circuitized and fabrication is completed. Figure 22.4c.shows this construction as illustrated in IPC-2226. 22.3.1.4 Type IV Constructions. This construction (1[P]0 or 1[P]1 or >2 [P] > 0) describes an HDI in which the build-up layers are used over an existing drilled and plated passive substrate. The printed circuit or metal core substrate is typically manufactured using conventional

5 m

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